HPSDR MAGISTER

The project leader for the Magister board is Lyle Johnson, KK7P

Magister is an FPGA based interface controller card that provides a high-speed USB 2.0 interface for the Atlas bus, as well as limited additional I/O lines intended for radio control (e.g., bandswitching, CW paddle and so forth). It uses the same Altera Cyclone II FPGA as Ozy and is capable of running the current Ozy code (as of 19 September 2009).

The USB interface uses a Cypress FX2 chip, supporting full duplex USB communications at > 30MB/s.

NOTE: Magister is no longer available from TAPR.

Magister Development History

The project was undertaken by KK7P in mid-summer 2009. Three prototypes were constructed by early September 2009. Magister loads and runs current HPSDR code.

Magister was initially released under the TAPR NCL until TAPR hds an opportunity to build an initial quantity and distribute them.

Now that TAPR is sold out, and to support the project while awaiting the GigE-based interface card, Magister is now released under the TAPR Open Hardware License.

Design material are available on hamsdr.

PCB files: http://www.hamsdr.com/personaldirectory.aspx?id=1108

Schematic: http://www.hamsdr.com/personaldirectory.aspx?id=1109

Bill of Materials: http://www.hamsdr.com/personaldirectory.aspx?id=1110

The PCB files are complete, and the entire design is released under the TAPR OHL.

HPSDR 其它模块





注：Magister（原文出处，以上翻译整理仅供参考!）