HPSDR Support

This page contains Production and errata information for HPSDR Projects.

Latest revision 1 November 2009

Documents on this webpage unless otherwise specified, are released under Noncommercial Open Hardware License. Builders can make copies for noncommercial use but the authors using NCL maintain the commercial copyright (see http://www.tapr.org/NCL) for details.

File released under the OHL are explicity marked Open Hardware License.

HPSDR Manuals

HPSDR manuals page

Atlas Backplane

Atlas production schematic, Rev A (TAPR build), Released under NCL 1.0

PDF format

Atlas kit BOM, Rev A (TAPR build)

See Atlas manual on HPSDR manuals page

Atlas production PCB files, Rev A (TAPR build) , Released under NCL 1.0

Gerber format zip file

Atlas known errata/rework

PDF format

Ozymandias USB interface

Ozy production schematic, Rev B (TAPR build), Released under NCL 1.0

PDF format

Ozy production BOM, Rev A (TAPR build) These documents, produced by TAPR personal under the NCL license, reflect the as built parts list. These files are provide for those that purchased "PCB only" boards from TAPR

Excel format

PDF format

Ozy production PCB files, Rev A (TAPR build), Released under NCL 1.0

Gerber format zip file

Ozy known errata/rework

PDF format

Ozy USB Utilities/Drivers

Ozy libUSB (zip file)

Ozy USB utilities (zip file)

Ozy production test (TAPR build)

Ozy/Janus production test procedure (PDF format)

self-test FPGA image (sof format)

self-test FPGA image (pof format)

self-test FPGA image (Verilog source zip file)

PC batch and executable test programs (zip file)

Bootloader instructions

Ozy bootloader procedure (PDF format) Ozy comes with the bootloader installed and the firmware is reloaded in volatile memory each time the computer software (powerSDR, Kiss Konsole, ghpsdr, et.c) is started. The procedure in this PDF is for those that have lost or never had a bootloader on the Ozy board. The symptoms are that the Ozy board does not answer the start up commands.

Magister USB interface

Magister/Ozy differences

PDF format

Magister production schematic, Rev B (TAPR build), Released under OHL

PDF format

Magister production PCB files, Rev A (TAPR build), Released under OHL

Gerber format zip file

Magister production BOM files, Rev A (TAPR build), Released under OHL

Bill of Materials

Janus A/D - D/A

Janus production schematic, Rev XC11 (TAPR build)

PDF format, Released under NCL 1.0

Janus production BOM, Rev A (TAPR build)

Excel format

PDF format

Janus known errata/rework

PDF format

Janus production test (TAPR build)

Ozy/Janus production test procedure (PDF format)

self-test FPGA image (pof format)

self-test FPGA image (Verilog source zip file)

production FPGA image (pof format)

production FPGA image (Verilog source zip file)

PC batch and executable test programs (zip file)

Penelope Transmitter

Penelope production schematic, Rev A (TAPR build), Released under OHL

PDF format

Penelope production BOM, Rev A (TAPR build)

Excel format

PDF format

Penelope production PCB files, Rev A (TAPR build)

Gerber format zip file, Released under OHL

Penelope known errata/rework

PDF format

Penelope production test (TAPR build)

production test procedure (PDF format)

self-test FPGA image (sof format)

self-test FPGA image (pof format)

self-test FPGA image (Verilog source zip file)

production FPGA image (sof format)

production FPGA image (pof format)

production FPGA image (Verilog source zip file)

Pennylane Transmitter

Pennylane schematic, Rev A, Released under OHL

PDF format

Penelope production PCB files, Rev A (TAPR build)

Gerber format zip file, Released under OHL

Mercury Receiver

Mercury production schematic, Rev A (TAPR build)

PDF format, Released under OHL

Mercury production BOM, Rev A (TAPR build)

Excel format

PDF format

Mercury known errata/rework

V1.0 PDF format

V2.0 PDF format

Mercury production test (TAPR build)

production test procedure (PDF format)

self-test FPGA image (sof format)

self-test FPGA image (pof format)

self-test FPGA image (Verilog source zip file)

production FPGA image (sof format)

production FPGA image (pof format)

production FPGA image (Verilog source zip file)

HPSDR Test Fixture Cable (for Ozy, Janus, Penelope, Mercury)

Test Fixture schematics

Loopback cable schematic (PDF format)

Ozy serial cable schematic (PDF format)

Janus PTT cable schematic (PDF format)

Janus reference oscillator schematic (PDF format)

LPU Power Supply

LPU production schematic, Rev B (TAPR kit)

PDF format, Released under NCL 1.0

LPU production BOM, Rev B (TAPR kit)

Excel format

PDF format

LPU build notes

PDF format

LPU known errata/rework

PDF format

Excalibur

PDF format Manual V1.0, Released under NCL 1.0

PennyWhistle

PDF format Manual V1.2, Released under NCL 1.0

PDF format Manual V1.1, Released under NCL 1.0

PDF format Manual V1.0, Released under NCL 1.0